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NXP Semiconductors /LPC18xx /USB0 /ENDPTCOMPLETE

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Interpret as ENDPTCOMPLETE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ERCE0)ERCE0 0 (ERCE1)ERCE1 0 (ERCE2)ERCE2 0 (ERCE3)ERCE3 0 (ERCE4)ERCE4 0 (ERCE5)ERCE5 0RESERVED0 (ETCE0)ETCE0 0 (ETCE1)ETCE1 0 (ETCE2)ETCE2 0 (ETCE3)ETCE3 0 (ETCE4)ETCE4 0 (ETCE5)ETCE5 0RESERVED

Description

Endpoint complete

Fields

ERCE0

Endpoint receive complete event for physical OUT endpoints 5 to 0. This bit is set to 1 by hardware when receive event (OUT/SETUP) occurred. ERCE0 = endpoint 0 … ERCE5 = endpoint 5
ERCE1

Endpoint receive complete event for physical OUT endpoints 5 to 0. This bit is set to 1 by hardware when receive event (OUT/SETUP) occurred. ERCE0 = endpoint 0 … ERCE5 = endpoint 5
ERCE2

Endpoint receive complete event for physical OUT endpoints 5 to 0. This bit is set to 1 by hardware when receive event (OUT/SETUP) occurred. ERCE0 = endpoint 0 … ERCE5 = endpoint 5
ERCE3

Endpoint receive complete event for physical OUT endpoints 5 to 0. This bit is set to 1 by hardware when receive event (OUT/SETUP) occurred. ERCE0 = endpoint 0 … ERCE5 = endpoint 5
ERCE4

Endpoint receive complete event for physical OUT endpoints 5 to 0. This bit is set to 1 by hardware when receive event (OUT/SETUP) occurred. ERCE0 = endpoint 0 … ERCE5 = endpoint 5
ERCE5

Endpoint receive complete event for physical OUT endpoints 5 to 0. This bit is set to 1 by hardware when receive event (OUT/SETUP) occurred. ERCE0 = endpoint 0 … ERCE5 = endpoint 5
RESERVED

reserved
ETCE0

Endpoint transmit complete event for physical IN endpoints 5 to 0. This bit is set to 1 by hardware when a transmit event (IN/INTERRUPT) occurred. ETCE0 = endpoint 0 … ETCE5 = endpoint 5
ETCE1

Endpoint transmit complete event for physical IN endpoints 5 to 0. This bit is set to 1 by hardware when a transmit event (IN/INTERRUPT) occurred. ETCE0 = endpoint 0 … ETCE5 = endpoint 5
ETCE2

Endpoint transmit complete event for physical IN endpoints 5 to 0. This bit is set to 1 by hardware when a transmit event (IN/INTERRUPT) occurred. ETCE0 = endpoint 0 … ETCE5 = endpoint 5
ETCE3

Endpoint transmit complete event for physical IN endpoints 5 to 0. This bit is set to 1 by hardware when a transmit event (IN/INTERRUPT) occurred. ETCE0 = endpoint 0 … ETCE5 = endpoint 5
ETCE4

Endpoint transmit complete event for physical IN endpoints 5 to 0. This bit is set to 1 by hardware when a transmit event (IN/INTERRUPT) occurred. ETCE0 = endpoint 0 … ETCE5 = endpoint 5
ETCE5

Endpoint transmit complete event for physical IN endpoints 5 to 0. This bit is set to 1 by hardware when a transmit event (IN/INTERRUPT) occurred. ETCE0 = endpoint 0 … ETCE5 = endpoint 5
RESERVED

reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data